New EUPEX deliverable on the applications we optimised for SVE and HBM
Our WP3 has tailored applications to make good use of the two main hardware specificities which the EUPEX pilot platform should expose to end developers: the Scalable Vector Extension (SVE) instruction set, and High Bandwidth Memory (HBM)
This document reports activities accomplished in WP3 during the second year of the project. The work done in this document has been carried out over the period from M12 to M24, and it is focused on the optimisation of the applications that constitute the EUPEX benchmark suite.
In particular, the work has tailored applications to make good use of the two main hardware specificities which the EUPEX pilot platform should expose to end developers: the Scalable Vector Extension (SVE) instruction set, and High Bandwidth Memory (HBM). Both of these hardware features are still unusual for CPUs, and the Fujitsu A64FX platform is to date the only platform to combine both of these characteristics. Accordingly, the A64FX partition of the Irène supercomputer hosted by the CEA in France has been used for a large fraction of this optimisation work.
As described in the DoA part B, the objectives of this deliverable are the optimisation of EUPEX use cases for SVE and HBM, with a particular focus on portability, scalability, and accuracy. Porting strategies for targeting the novel hardware features are described for each application use case. Benchmark results highlighting the effect of SVE and HBM usage are also presented and discussed.
Lessons learned from this exercise by each partner have been distilled in the conclusions, and will provide useful insights for the community of applications that will be hoping to target the future JUPITER Exascale-class European supercomputer, which will feature EPI hardware.
