At HiPEAC 26 in Krakow, EUPEX hosted a workshop focused on preparing European applications and users to efficiently exploit future ARM-based exascale machines.

This workshop showcased the work carried out within the EUPEX project, highlighting how applications and tools were developed and integrated to create synergies across the project ecosystem. It also explored approaches to energy-efficient high-performance computing (HPC), readiness for ARM-based exascale systems, and European technological sovereignty.

Agenda, Slides and Records

EUPEX introduction and structure of the workshop

Jean-Robert Bacou and Etienne Walter, Eviden/Bull

 

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EUPEX Use cases and software ecosystem

Matteo Turisini, Cineca

 

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Thomas Moschny, ParTec

 

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Energy efficiency towards Exascale class systems

Eric Boyer, Genci

 

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Preparing flagship European codes for the sovereign Rhea CPU – Feedback from CoEs to foster co-design with EUPEX

Antoine Morvan, Eviden/Bull (CEPP)

 

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Energy efficiency optimization in using dynamic tuning of Grace Hopper frequencies

Ondrej Vysocky, IT4Innovations

 

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Focus on the energy-efficiency of components of the IFS on Grace Hopper GH200 superchips

Mathieu Stoffel, Eviden/Bull

 

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Embracing modular supercomputers with hybrid workflows: the SPECFEM3D 

Piero Lanucara, Cineca

Iacopo Colonnelli, Universiy of Torino

 

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Challenges and techniques of the XHC framework to improve the performance of collective primitives on multi-core nodes with complex internal topologies

George Katevenis, FoRTH

 

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Giorgos Saloustros, FoRTH

 

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